3.1 Hardware

The CPU and Architecture

Von Neumann Architecture

Most modern computers are based on the Von Neumann model, where both data and programs are stored in the same memory (RAM).

Key Components:

  • ALU (Arithmetic Logic Unit): Performs calculations (2+2) and logical decisions (Is A > B?).
  • CU (Control Unit): Coordinates the activities of the CPU and manages the flow of data.
  • System Clock: Sends continuous pulses to regulate the speed of the CPU (measured in GHz).
Concept Diagram
Figure 3.1.1: The CPU and Architecture

Registers and the FDE Cycle

CPU Registers

Registers are high-speed storage locations inside the CPU. You must know these specific names:

  • PC (Program Counter): Holds the address of the next instruction.
  • MAR (Memory Address Register): Holds the address of the current instruction/data being accessed.
  • MDR (Memory Data Register): Holds the actual data/instruction fetched from memory.
  • CIR (Current Instruction Register): Holds the instruction currently being decoded/executed.
  • ACC (Accumulator): Stores the results of calculations from the ALU.

The Fetch-Decode-Execute Cycle

The CPU fetches an instruction from memory using the address in the PC, decodes it in the CIR, and the CU then executes the command.

Concept Diagram
Figure 3.1.2: Registers and the FDE Cycle

Buses

Connecting the Components

Buses are parallel wires used to transfer data between the CPU, memory, and I/O devices.

  • Address Bus: Carries addresses from CPU to RAM. It is Unidirectional (one-way).
  • Data Bus: Carries data between CPU and RAM. It is Bi-directional.
  • Control Bus: Carries signals (like "Read" or "Write") from the CU. Bi-directional.
Concept Diagram
Figure 3.1.3: Buses